The present invention generally relates to the field of semiconductors, and more particularly relates to a self-aligned vertical transistor.
Vertical transistors are a promising option for technology scaling for 7 nm and beyond. However, conventional vertical transistors sometimes suffer from extension resistance. In addition, conventional vertical transistors usually have asymmetry in device characteristics due to the formation of the bottom source/drain and top source/drain at different processing steps. This can lead to variation in vertical transistor circuits.